(I'm putting this in Talk until it can be wikified for the article. Zuzu 15:18, 17 September 2007 (UTC) )
I got rid of the memory stability problem by disabling the 32M PC66 memeory that is built in the motherboard. I found out that byte 2B of CMOS controls the SDRAM banks. Bit b0 disables internal 32M memory. By changing the content from 80 -> 81 the 32M is disabled.
Now I have two 128 Sodimms working fine. No need more to seek for cas3.
2B is row 20 column B in the editor inside the BIOS config - see pkiff's reply
I checked modifying manually the following bytes/bits from CMOS which are propably dealing with cache
2CH FD -> BD -- disable internal cache 2DH 10 -> 14 -- disable internal cache 3BH 0 -> 03 -- enable internal and external cache
None of them help. So I am starting to believe, that the problem is inside the IBM bios code setting up the caches in a PII way instead of PIII way.
I don't know if your machine has the same bios than mine 600E. Anyway, this is how I do in my 600E.
When you boot, you get bios post error 127. Then you shoud do the following:
Choose "test", choose "exit", choose "config", hit "ctrl-d", opens bios hex-editor. Take cursor to position 20, key "02" -> "0A", hit "F2", hit "esc", choose "exit", choose "ok", and reboot.
Next boot should go without error-127
The hex-editor calculates the checksum automatically.
In case you edit the bios data and the machine doesn't boot correctly, you can always reset the CMOS data by taking out the bios cmos battery for 30 seconds. After that the next boot will preset it to initial values (you have to set the time also).