(I'm putting this in Talk until it can be wikified for the article. Zuzu 15:18, 17 September 2007 (UTC) )
I got rid of the memory stability problem by disabling the 32M PC66 memeory that is built in the motherboard. I found out that byte 2B of CMOS controls the SDRAM banks. Bit b0 disables internal 32M memory. By changing the content from 80 -> 81 the 32M is disabled.
Now I have two 128 Sodimms working fine. No need more to seek for cas3.
I checked modifying manually the following bytes/bits from CMOS which are propably dealing with cache
2CH FD -> BD -- disable internal cache 2DH 10 -> 14 -- disable internal cache 3BH 0 -> 03 -- enable internal and external cache
None of them help. So I am starting to believe, that the problem is inside the IBM bios code setting up the caches in a PII way instead of PIII way.